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[Other resource] NAND256R3A_VE1

Description: 256Mbits (x8) 528 Bytes Page, NAND Flash Memory Verilog HDL Model User Manual -256Mbits (x8) 528 Bytes Page, NAND Flash Memory Verilog HDL Model User Manual
Platform: | Size: 203769 | Author: 陈强 | Hits:

[Other resource] wp_max_flash

Description: FPGA中FLASH配置控制源码,VHDL和Verilog
Platform: | Size: 38165 | Author: wanggui | Hits:

[Other resource] MXIC-SPIFlash-Model

Description: Verilog based simluation model for MXIC SPI Flash.
Platform: | Size: 77518 | Author: ronsullivan | Hits:

[Other] SPI-NOR-Flash-controller

Description: 难得的SPI NOR Flash控制器Verilog源代码-A rare SPI NOR Flash controller Verilog source code
Platform: | Size: 111616 | Author: liwei | Hits:

[VHDL-FPGA-Verilog] SPI-NOR-Flash-controller-Verilog

Description: SPI NOR Flash控制器Verilog源代码-SPI NOR Flash controller Verilog
Platform: | Size: 110592 | Author: 卫进 | Hits:

[Other] GD25LQ40_verilog

Description: SPI接口的flash仿真模型，用于soc仿真，本人使用过了，很好用的-spi flash verilog model
Platform: | Size: 27648 | Author: 毛昌荣 | Hits:

[Other] SPI-flash

Description: ST公司的M25Pxx SPI flash memory的verilog仿真模型，该模型准确地描述了SPI flash memory的行为，包括读，写，擦除等操作，可以用来挂在带有SPI接口的soc外部，方便验证SPI接口。 -ST' s verilog simulation model M25Pxx SPI flash memory, the model accurately describes the SPI flash memory behavior, including reading, writing, erasing and other operations can be used to hang outside the soc with SPI interface to facilitate verification SPI interface.
Platform: | Size: 139264 | Author: alex wang | Hits:

[VHDL-FPGA-Verilog] flash

Description: 用Verilog写的FLASH测试程序。先向FLASH里面写数据，然后再将数据读出来做比较。-Written using Verilog FLASH test program. Xianxiang FLASH write data inside, and then read out the data for comparison.
Platform: | Size: 1024 | Author: Daniel | Hits:

[Other] flash

Description: fpga Verilog 控制读写flash-fpga Verilog flash
Platform: | Size: 2048 | Author: 建邺区 | Hits:

[Other] flash

Description: flash控制器的verilog代码，有点用-flash controller
Platform: | Size: 6144 | Author: liujie | Hits:

[Picture Viewer] 7_to_1-LVDS-dispaly-from-FLASH

Description: 该代码是基于verilog 实现的代码，可以用于对接受1080P的LVDS视频数据并处理后显示到各种规格的LCD屏幕上，且支持从FLASH中读取BMP的图片数据并实时显示到LCS屏幕-The code is based on the code verilog achieve, it can be used for receiving LVDS 1080P video and data processing displayed on a variety of LCD screen, and support for reading data the FLASH BMP images and real-time display to the LCS screen
Platform: | Size: 104448 | Author: albert | Hits:

[VHDL-FPGA-Verilog] spi_flash_controler

Description: w25q64 spi flash verilog code .use xilinx ise .
Platform: | Size: 5876736 | Author: zhufull | Hits:

[VHDL-FPGA-Verilog] flash_test

Description: 使用Verilog HDL语言驱动FPGA读写flash(FPGA read and write flash)
Platform: | Size: 1024 | Author: xyheng | Hits:

[VHDL-FPGA-Verilog] 12_flash_test

Description: 对W25Q128的读写操作,spi 0 模式(read and write flash W25Q128)
Platform: | Size: 1677312 | Author: sdayd | Hits:

[Other] LCD-104

Description: serial flash memeory interface with verilog
Platform: | Size: 239616 | Author: eng_mohamed12 | Hits:

[VHDL-FPGA-Verilog] parallel_norflash_test

Description: ISE工程，并行nor flash的读、写、擦出，其中有个调用FIFO16-16的IP核，已经在工程中(ISE engineering, parallel nor FLASH read, write, erase, where there is a call FIFO16-16 IP core, has been in the project)
Platform: | Size: 1124352 | Author: 张超 | Hits:

[VHDL-FPGA-Verilog] spi_master

Description: SPI通信：串行flash的读写擦除命令通过SPI接口进行通信。? CPU芯片与FPGA通过SPI接口进行通信。? 其他功能集成电路芯片参数寄存器配置。例如DAC芯片内部有很多寄存器（因为芯片有很多功能，要通过设置寄存器不同的开关来打开或关闭相应的功能，一上电去初始化寄存器）需要我们去配置。FPGA一上电也是通过配置芯片里边来读取数据，然后配置FPGA内部的SRAM。FPGA是读取FLASH里边的串行数据，读取完校验完才配置到我们的FPGA的SRAM中去。速度比串口快，而且是同步传输。(The read and write erasure commands of the serial flash communicate through the SPI interface. The CPU chip communicates with the FPGA through the SPI interface. Other functional integrated circuit chip parameters register configuration. For example,there are many registers in the DAC chip (because the chip has many functions. We need to configure it by setting up different registers to open or close the corresponding functions, and initializing registers on the battery. FPGA also reads the data by configuring the chip, and configures the SRAM inside the FPGA. FPGA is a serial FLASH read the data inside,read check after all the configuration to the FPGA SRAM to). The speed is faster than the serial port, and it is synchronous transmission.)
Platform: | Size: 3389440 | Author: 小云子 | Hits:

[VHDL-FPGA-Verilog] led_test

Description: 一个简单的LED跑马灯实验，通过延时来控制LED的闪烁时间，可以通过这个程序来进行verilog语言的入门(A simple LED marquee experiment, through the delay to control the LED flash time, can be used to get the introduction of Verilog language through this program)
Platform: | Size: 2267136 | Author: zhegn | Hits:

[VHDL-FPGA-Verilog] multi_cpu

Description: 主要功能包含： // 1.按照CPU小系统规范要求，实现了各寄存器的读、写、控制等功能 // 2.实现了部分CPU读取配置字功能 // 3.实现了看门狗功能 // 4.实现了FLASH和BOOTROM控制功能 // 5.其它用户功能（按需进行添加）(The main functions include: According to the 1. / / CPU small system specifications, the realization of the register read and write control functions 2. / / achieve a part of the CPU configuration word read function 3. / achieve a watchdog function 4. / / FLASH and achieve a BOOTROM control function 5. / other user function (on-demand add))
Platform: | Size: 6144 | Author: fengyuanzyt | Hits:

[VHDL-FPGA-Verilog] FPGA_flash设计

Description: 我们的设计是用一个FSM控制器来控制发送什么命令，flash模块判断FSM发送过来的state信号来选择应该执行什么操作，当命令写入或者读出后，会发送一个flag_done命令，这个命令让我们判断上个指令是否完成，如果完成后FAM将发送下一个命令.(Our design uses a FSM controller to control what commands are sent. The flash module judges the state signal sent by the FSM to select what operation should be performed. When the command is written or read out, a flag_done command is sent. This command lets us judge whether the last word is finished or if the FAM will be sent after completion. The next command)
Platform: | Size: 249856 | Author: 硅渣渣 | Hits:
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